Understanding Binary Arithmetic & 2's Complement
In computer architecture, the Arithmetic Logic Unit (ALU) does not utilize separate circuits for addition and subtraction. Instead, modern microprocessors streamline calculations by relying entirely on binary addition. To perform a subtraction operation such as A - B, the computer essentially evaluates A + (-B). It achieves this by representing negative numbers using the highly efficient 2's Complement method.
How 2's Complement Works
Representing a negative integer in a fixed-bit binary system requires converting the positive magnitude of that number into its 2's complement form. This is done in two rapid steps:
- 1's Complement: Invert all the bits of the positive binary representation (change every 0 to 1, and every 1 to 0).
- Add 1: Add a binary 1 to the least significant bit (LSB) of the resulting 1's complement.
The Most Significant Bit (MSB)—the bit furthest to the left—acts as the Sign Bit. A 0 indicates a positive number, while a 1 dictates a negative number.
The Logic Behind Overflow Detection
When performing binary addition in a fixed-width environment (like a 4-bit, 8-bit, or 32-bit register), an Overflow occurs when the mathematical sum exceeds the maximum or minimum value the register can hold. The ALU detects overflow strictly by observing the sign bits of the operands and the result:
- Positive + Positive = Negative: If two positive numbers (MSB of 0) are added and yield a negative result (MSB of 1), the result has overflowed into the sign bit.
- Negative + Negative = Positive: If two negative numbers (MSB of 1) are added and yield a positive result (MSB of 0), a mathematical underflow/overflow has occurred.
- Mixed Signs: Adding a positive number to a negative number will never result in an overflow, as the magnitude of the result is guaranteed to be smaller than the largest operand.